例句與造句

1. This latency shows up as a component of the branch misprediction latency.
2. The ROB was motivated mainly by branch misprediction recovery.
3. Guessing wrong is called branch misprediction.
4. This predictor was used as the Alpha 21264 has a minimum branch misprediction penalty of seven cycles.
5. The front end has a short pipeline, resulting in a small three-cycle branch misprediction penalty.
6. It's difficult to find branch misprediction in a sentence. 用branch misprediction造句挺難的
7. The Alpha 21464 ( EV8, cancelled late in design ) had a minimum branch misprediction penalty of 14 cycles.
8. Due to the instruction cache's two cycle latency and the instruction queues, the average branch misprediction penalty is 11 cycles.
9. The processor must " throw away " any results from the bad-path, speculatively-executed instructions when it discovers the exception or branch misprediction.
10. The time that is wasted in case of a branch misprediction is equal to the number of stages in the pipeline from the fetch stage to the execute stage.
11. However, if the processor has a branch misprediction then the entire buffer may need to be flushed, wasting a lot of clock cycles and reducing the effectiveness.
12. The partially processed instructions in the pipeline after the branch have to be discarded and the pipeline has to start over at the correct branch when a branch misprediction is detected.
13. An exception or branch misprediction causes the remap file to back up to the remap state at last valid instruction via combination of state snapshots and cycling through the previous tags in the in-order pre-graduation queue.
14. Since this mechanism is required, and since it can recover any remap state ( not just the state before the instruction currently being graduated ), branch mispredictions can be handled before the branch reaches graduation, potentially hiding the branch misprediction latency.
15. When execution resources would not be used by the current task in a processor without hyper-threading, and especially when the processor is stalled, a hyper-threading equipped processor can use those execution resources to execute another scheduled task . ( The processor may stall due to a cache miss, branch misprediction, or data dependency .)